The SonicVI silicon MKI Tone Bender is firmly based on the original, with a few additions and some minor changes.
Being silicon based, the transistors do not self-bias, so additional resistors have been added from V- to the base of Q1 & Q3.
The transistors used are early Mullard PNP silicon OC202 which are quite low-gain and still available at reasonable prices. In terms of gain, it's down in the 40-120hfe range.
I tested some random vintage silicon transistors that I had handy, and around 85hfe did the job. Being silicon, this is easily flipped to NPN by reversing the electrolytic caps, as long as you have similar transistors. I've tested with PN2222A and it was fine. Out of the transistors tested, the lower gain vintage ones sounded a tad better to my ears - I suspect this has more to do with hfe than age.
ASSUMPTIONS
Given I did the layout based on a photo from Reverb, there are some unknowns - not too many though, as most of the values are clearly visible.
Trimmer: A 25k to 50k trimmer works well, set on the edge of gating to get that MKI decay.
Attack: The Attack pot is paired with a 150k resistor - 50k is fine, quite possibly with a low value resistor hidden under the board. Tune it so it just cuts off with the pot on zero. I'd say test this with a couple of different size pots (50k or smaller), to see what suits you.
Level: I've assumed the value of the Level pot to is 500k, which is the same as a MKI
SONIC VI SILICON MKI TONE BENDER - EYELET BOARD LAYOUT
MULLARD OC202 DATASHEET
SONIC VI SILICON MKI vs PIGDOG MKI
STANDARD VERO VERSION - NPN
BREADBOARD TESTING - WORK IN PROGRESS
It’s sounding really nice on the breadboard. Sharp attack, same frequency response as a stock MKI, and there’s even the spitty decay on the end of notes.
It did pickup radio on the breadboard and squelch a bit - a low value cap on the input sorts this out. Not sure what I even have on there at the moment as I picked up a random small greenie off the bench - think it's 3n3. Needs a cap on the power supply, again, helps with noise.
Tested with;
2N4036 PNP Silicon (vintage ones, although they were in production until quite recently)
Q1 86hfe Q2 81hfe Q3 106hfe
PN2222A NPN Silicon (new)
Q1 - Q3, approx 220hfe
That sounds fantastic, have you built this one yet Andrew?
ReplyDeleteHey G.G. I'll give it a try shortly. I literally just saw it about an hour or two ago and finished the layout.
DeleteI plan on testing on the breadboard, and if all goes well, I'll post another layout on regular vero or similar with normal pin spacing. Not everyone will be able to access transistors with long legs or will want to build on eyelet board.
Works like a charm on the breadboard - and you can dial in the MKI scatty decay
ReplyDeleteJust checking if the NPN veroboard version has already been verified. I did a test build yesterday without any luck.
ReplyDeleteSorry. There’s a mistake on the vero layout. Jumper from the 100n cap on column 12 row 4 to the base of the third transistor (below the 12k) and it should work.
DeleteI’ll update the layout shortly. Sorry about that, really obvious now that I look at it again.
From Column 12 (row 4) to Column 18 (Row 7)?
ReplyDeleteYes that's right. Corrected layout has been uploaded
DeleteThat being said you can mark this as verified (at least the v1 with the jumper)
DeleteGlad that it was an easy fix and it's now working
DeleteMy NPN veroboard version starts to get too much juice after 3 o'clock on the Attack pot. Should I adjust the size of the 8.2K resistor?
ReplyDeleteCould try a lower value pot, changing to log would also help.
DeleteLowering the 8k2 may help a little.